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1. Write generic instructions to compute (p + q) / (r - p) + p * (r – q) using a processor that supports: (i) 2-address instructions (ii) 1-address instructions (iii) 0-address instructions on a stack based processor. You may assume operations in the following table where x, y, z are registers; A is a memory address. 2-address meaning 1-address 0-address add x,y x←x+y add A push A sub x,y x←x-y sub A pop A mul x,y x←x*y mul A add div x,y x←x/y div A mul load x,A load A div store x,A store A sub 2 Assume an 11-bit floating point format in which the most significant bit is the sign bit, the next 4 bits represent the 4-bit biased exponent field, and the last 6 bits represent the normalized significand with implied bit. …show more content…
(ii) Determine the range of binary numbers that can be represented and represent on a number line including overflows and underflows. (iii) What is the 11-bit floating point representation of 257? (iv) What is the decimal result of adding 257 and 11 using the 11-bit floating point representation? 3 Assuming a two’s complement integer representation, use Booth’s algorithm to multiply multiplicand, 11011(-5) and multiplier, 11011 (-5). 4 Consider a one word, one-address instruction. The instruction's memory address is X. The address field of the instruction contains Y. Write down an expression in terms of X and Y for the address of the corresponding operand in each of the following addressing modes: (i) immediate (ii) direct (iii) indirect (iv) PC …show more content…
6. Write a machine language routine that copies the least significant four bits from memory location A5 into the most significant four bits of location A6 while leaving the other bits at location A6 unchanged. 7. Write a machine language routine that places 0s in all the memory cells from address B1 through D1 but is small enough to fit in the memory cells from address 00 through 13 (hexadecimal). A Machine language to be used in Assignment 2 The Machine Architecture The machine has 16 general purpose 8-bit registers numbered 0 through F (in hexadecimal). Each register can be identified in an instruction by specifying the hexadecimal digit that represents its register number. Thus register 0 is identified by hexadecimal 0 and register 10 is identified by hexadecimal A. Main memory size is 256 bytes. Each byte has a unique 8-bit address consisting of an integer in the range 00 (hexadecimal) to FF (hexadecimal). Integer values are stored using a two’s complement representation. Floating-point values are stored in an 8-bit representation: sign bit, followed by a 3-bit biased exponent and a 4-bit normalized significand with implied bit. The Machine
Figure 2 shows the implementation of FMULT_ACCUM. Inputs to the FMULT block are two’s complement and floating point parallel input. Output of this block is two’s complement 1 bit serial output. A four bit Count_in signal is used as a counter which avails FMULT to repeat operations after 16 iterations. Clear_Accum and Clear_Carry signals are used to reset accumulator. Done_Signal is used to reset the counter. The reason to choose 146 will be discussed in the accumulator section. These logics are implemented using finite state machine.
This is the 2nd classification of an assembly language. It was introduced in the late 1950’s. The 1st generation language being binary, i.e. combination of 1’s and 0’s was difficult to understand and there was high chances of error and hence the 2nd generation language was introduced. This language used letters of the alphabet instead of 1’s and 0’s making it easier to use. Some of its properties are:
To further this investigation, one could look into a formula that works for negative indices and compare this to positive integer formula. A pattern could be found from the two results and a formula could be created that works and generates answers for both positive and negative indices.
Before the year 2000, there was small speculation amongst programmers of a problem that would arise in the year 2000. Many of the computer programs in use were made between the 60’s and 80’s, and stored years with only two decimal digits, this being d...
Normally, you read binary numbers bytewise (8 bit wise). Start at the last bit, bit 0. If it is 1, add 2^0 to your number, else add 0. Then the next bit, bit 1, If it is 1, add 2^1 (2) to your number, If bit 3 is 1 add 2^2 (4) to your number, if bit 4 is 1 add 2^3 (8) to your number ... if bit 8 is 1 add 2^7 (128) to your number. You see, the base is always 2 because it can be either 0 or 1. Example 1: 10100100 = 2^7+0+2^5+0+0+0+2^2+0+0 = 164 Example 2: 11111111 = 2^7+2^6+2^5+2^4+2^3+2^2+2^1+2^0 = 255 Thats it! Now to subnet addressing.
It is not necessary or desirable for the programming of embedded microprocessors to be done in assembly language. Indeed, assembly language should be regarded as a last resort, to be used when compilers are not available, or in very special circumstances.
The calculation of n terms in an arithmetic series with initial and final terms being a1 and an correspondingly, can be found with the help of the formula,
The programming language and hence the data type used by each system may vary as each system is implemented as
1's and 0's. Each of these tiny little instructions makes up a bit. Then they
An instruction format or instruction code is a group of bits used to perform a particular operation on the data stored in a computer. Processor fetches an instruction from memory and decodes the bits to execute the instruction. Different computers may have their own instruction set. An instruction is normally made up of a combination of an operation code and some way of specifying an operand, most commonly by its location or address in memory. Some operation codes deal with more than one operand; the locations of these operands may be specified using any of the many addressing schemes. Different machines have different instruction set architectures. These architectures are differentiated from one another by the number of bits allowed per instruction (16, 32, and 64 are the most
system which allowed computers to read information with either a 1 or a 0. This
Among the ISAs duties include defining the capabilities and functions of the CPU. These functions are based on its capacity to process various programming needs. ISA consists of the execution model, registers, input-output control, as well as instructions. The importance of the ISA stems from the fact that it defines all facets required by machine language programmers for purposes of sound programming (Hsu 44). However, it must be noted that the definitions between different ISAs might differ. This is because they define a broad range of aspects such as supported data types, their semantics, state, as well as the overall instructions set. This covers issues like memory consistency, registers, and machine
In the Full Adder function of Table 2.1, the maximum number of times that an output pattern is repeated is 3 (for output patterns 10 and 01). Hence, at least Γlog2(3)˥, = 2 garbage outputs and one constant input are required to make the Full Adder function reversible. Table 2.2 shows a reversible form of the Full Adder function where go1 and go2 are the garbage outputs and gi is the constant input. Note that assigning 0 to gi leads to obtaining outputs cout and sum, but the don't-cares are assigned in the way that assigning 1 to gi inverts the cout output.
The main component in a microchip is the transistor. Computers operate on a binary system, which uses only two digits: 0 and 1, all kinds of information are converted into combinations of 1s and 0s. As transistors can act as a switch, therefore their application in a computer microchip is to either let current through, representing the binary digit 1, or cut it off, representing 0. (http://www.pbs.org/transistor/teach/teacherguide_html/ lesson3. html) All aspects of modern Western Society rely on computers. Computers cannot operate without microchips, which’s main component is a transistor. Hence, the transistors impact on modern Western Society is immeasurable.